The following relates generally to electronic memory devices and integrated circuits, and more specifically to buried lines and related fabrication techniques.
In the context of electronic devices (e.g., integrated circuits), buried lines may refer to one or more conductive lines located below a top surface of a stack of materials. Examples of buried lines may include electrodes, circuit traces, interconnects, or—in the example of a memory device—access lines, such as bit lines or word lines. In some fabrication processes, lines located at a buried layer (e.g., below the top layer of the aforementioned stack) of a stack may be constructed when the layer is at the top of the stack (e.g., before layers that ultimately may be above the given layer are formed), or may be constructed using techniques that are repeated for each of multiple levels of the stack (e.g., multiple memory decks of a 3D memory device), which may increase a number of requisite processing steps (e.g., masking steps) as well as processing times and associated fabrication costs.
Improved fabrication techniques and structures for buried lines in electronic devices (e.g., integrated circuits, including memory devices), are desired.